v 20130925 2
C 40000 40000 0 0 0 title-A4.sym
C 45300 45150 1 270 0 resistor-2.sym
{
T 45600 44750 5 10 1 1 0 0 1
refdes=R1
T 45950 44600 5 10 1 1 180 0 1
value=22K
}
C 46500 45150 1 270 0 resistor-2.sym
{
T 46800 44750 5 10 1 1 0 0 1
refdes=R2
T 47250 44600 5 10 1 1 180 0 1
value=120K
}
N 45400 45150 45400 45900 4
N 46600 45500 47600 46400 4
N 47600 45500 46600 46400 4
N 48800 45150 48800 45900 4
N 48800 47100 48800 46900 4
N 48800 44050 45400 44050 4
N 45400 47100 45400 46900 4
N 45400 47100 48800 47100 4
C 47000 43750 1 0 0 gnd-1.sym
T 45650 40900 9 16 1 0 0 0 1
Astable  Multivibrator
C 40650 40350 1 0 0 spice-model-1.sym
{
T 40750 40950 5 10 1 1 0 0 1
refdes=A1
T 41950 40650 5 10 1 1 0 0 1
model-name=BC558
T 41150 40450 5 10 1 1 0 0 1
file=../../lib/models/bc558.mod
}
C 47500 45150 1 270 0 resistor-2.sym
{
T 48050 44900 5 10 1 1 180 0 1
refdes=R3
T 47750 44450 5 10 1 1 0 0 1
value=120K
}
C 48700 45150 1 270 0 resistor-2.sym
{
T 49250 44900 5 10 1 1 180 0 1
refdes=R4
T 48950 44450 5 10 1 1 0 0 1
value=22K
}
N 46000 46400 46600 46400 4
N 46600 45150 46600 45500 4
N 48200 46400 47600 46400 4
N 47600 45150 47600 45500 4
C 48200 46900 1 180 1 pnp-3.sym
{
T 48350 46500 5 10 1 1 0 6 1
refdes=Q2
T 47900 46700 5 10 1 1 0 0 1
value=BC558
}
C 46000 46900 1 180 0 pnp-3.sym
{
T 45850 46500 5 10 1 1 0 0 1
refdes=Q1
T 45750 46700 5 10 1 1 0 0 1
value=BC558
}
C 42800 46200 1 0 0 vcc-1.sym
C 42800 46200 1 270 0 voltage-3.sym
{
T 43500 46000 5 8 0 0 270 0 1
device=VOLTAGE_SOURCE
T 43300 45700 5 10 0 1 0 0 1
refdes=Vcc
T 42000 45700 5 10 1 1 0 0 1
value=DC 3V
}
C 42900 45000 1 0 0 gnd-1.sym
C 46900 47100 1 0 0 vcc-1.sym
T 45100 40100 9 10 1 0 0 0 1
1
T 46600 40100 9 10 1 0 0 0 1
1
T 44900 40400 9 10 1 0 0 0 1
bjt-astable-pnp.sch
T 49100 40400 9 10 1 0 0 0 1
2015 - 04 - 14
T 49100 40100 9 10 1 0 0 0 1
Mike Waters
C 45400 45300 1 0 0 capacitor-1.sym
{
T 45600 46000 5 10 0 0 0 0 1
device=CAPACITOR
T 45500 45600 5 10 1 1 0 0 1
refdes=C1
T 45600 46200 5 10 0 0 0 0 1
symversion=0.1
T 46000 45600 5 10 1 1 0 0 1
value=0.1uF
}
C 47600 45300 1 0 0 capacitor-1.sym
{
T 47800 46000 5 10 0 0 0 0 1
device=CAPACITOR
T 47700 45600 5 10 1 1 0 0 1
refdes=C2
T 47800 46200 5 10 0 0 0 0 1
symversion=0.1
T 48200 45600 5 10 1 1 0 0 1
value=0.1uF
}
N 45400 44250 45400 44050 4
N 46600 44050 46600 44250 4
N 47600 44250 47600 44050 4
N 48800 44050 48800 44250 4
N 48500 45500 48800 45500 4
N 46600 45500 46300 45500 4
T 45600 41900 9 10 1 0 0 0 4
Suggested setting for TR analysis :
  Start time = 0.0 ms
  Stop time = 200.0 ms
  Step incr. = 100.0 us
T 45800 43200 9 10 1 0 0 0 1
Oscillation frequency = 33 Hz
T 40800 42100 9 10 1 0 0 0 2
This schematic can be simulated using
NG-Spice (last tested 2015-03-26).